Simulation of thin insulating tunnel layer for Cu2ZnSnS4/CdS interface passivation

Abstract

The CZTS solar cell has a high voltage deficit due to high interfacial recombination. The detrimental issues of conduction band offset, bandgap narrowing, interface defects and surface inversion at the CZTS/CdS junction are causing accelerated interfacial recombination and huge VOC and FF deficits. We proposed and theoretically analyzed a thin insulating tunnel layer for selective blocking holes and passing electrons through intraband tunnelling. The role of an insulating tunnel layer in neutralizing the interface defect and controlling interface recombination is explored. The CZTS/CdS configurations with tunnel layer have shown reduced recombination current and higher quantum efficiency. The tunnel layer incorporated devices have stable performance with increasing defects as opposed to devices without tunnel layer, which shows decreasing performance with increasing interface defects. The device performance of the tunnel layer device is η = 14.15%, with V OC , J SC, and FF of 0.95 V, 24.5 mA cm−2 and 60.6%, respectively. The corresponding performance parameter of the device without a tunnel layer at the interface is an efficiency of 10.9%, V OC = 0.73 V, J SC = 21.8 mA cm−2, and a fill factor of 68.3%. The result for the optimized device with interface passivation by tunnel layer is expected to stimulate experimentalists in the field.