Simulation of the stress state of GaN‐AlN based epitaxial devices

Abstract

AbstractThe stress state plays an important role in the performance of GaN‐AlN based multilayer epitaxial devices and their degradation with time. The stress state arises due to the superposition of stresses originating from multiple sources: (i) thermal mismatch, (ii) epitaxial growth, (iii) low angle grain boundaries (threading dislocations) and (iv) interfacial misfit edge dislocations. The current investigation pertains to the plane strain linear elastic finite element simulation of the stress state of a model GaN‐AlN high electron mobility transistor (HEMT) device on a Si substrate, taking into account the above‐mentioned sources of stresses. The value of stresses arising from grain boundary dislocations corresponds to the experimental results and imposed as tractions in the numerical model, while the other stresses are modelled using eigenstrains in appropriate regions in the finite element domain. A ten step simulation strategy is developed to simulate the stress state of the entire HEMT device. It is seen that: (i) the AlN layers are under tensile stress, (ii) the embedded GaN layers are under compressive stress, (iii) the GaN layer between source and drain is under tensile stress, (iv) the AlGaN layer is under tensile stress, (v) the source and the drain are mostly in tensile stress, while the gate is nearly stress‐free. The AlGaN and GaN layers (close to the source and drain) are under tensile stress (by considerations of pure epitaxy these are expected to be under compression). The critical thickness for the stability of a misfit edge dislocation at the AlN‐GaN interface is computed using the simulations. (© 2015 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)