Abstract

Substrate noise is a key problem in the design of large mixed-signal circuits. Estimating the interaction from large digital blocks and its effect on on-chip performance degradation is extremely important in mixed-signal IC design and is a major challenge in system-on-chip(SOC) design. In this paper, we address efficient methods and models to simulate substrate noise coupling at high level design with the real-time capability .Techniques to directly or indirectly compute the values of the elements in the cell macromodel are described. This approach makes it possible to predict substrate noise generation of large digital blocks in a very efficient and fast way and makes it compatible with the design flow of mixed-signal circuits. For verification, the macromodel accuracy is demonstrated in some example circuits.

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