Abstract

The distribution of fractional current change and threshold voltage shift in an ensemble of realistic 35 nm bulk negative-channel metal-oxide-semiconductor field-effect transistors caused by charge trapping on stress-generated defect states at the Si/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface is studied using 3-D statistical ¿atomistic¿ simulations. The simulations take into account the underlying random discrete dopant distribution in the transistors, which in conjunction with strategically positioned traps could result in rare but dramatic changes in the transistor characteristics. The evolution of threshold voltage distribution as a result of accumulation of trapped charges in the devices due to progressive negative bias temperature instability, positive bias temperature instability, or hot electron degradation is simulated and compared with simple analytical model predictions and recently published experimental measurements to demonstrate the necessity to consider statistical variability in realistic reliability simulations. The magnitude of the degradation in devices of different geometries is also investigated where minimal correlation is found.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.