Simulation of reduced charge interference in 3-D vertical gate NAND flash memory

Abstract

In this work, we propose two type of structures to reduce the charge interference by stored charge in the opposite side cell of a vertical gate 3-dimensional NAND flash memory. The first structure is a and the second is a ground. The barrier oxide physically blocks electrons moving by repulsive force from charge stored on the opposite cell. The virtual ground increases the energy band bending level close to the body region at the center and it blocks the effect of converged holes better then when only the barrier oxide was used. We investigated the I-V characteristics of the different structures at double programming or single programming. We used 3-D TCAD simulation tool and confirmed the effect of reduce charge interference by the proposed structures.