Simulation of plasma based semiconductor processing using block structured locally refined grids

Abstract

We have described a new numerical method for plasma simulation. Calculations have been presented which show that the method is accurate and suggest the regimes in which the method provides savings in CPU time and memory requirements. A steady state simulation of a four centimeter domain was modeled with sheath scale (150 microns) resolution using only 40 grid points. Simulations of semiconductor processing equipment have been performed which imply the usefulness of the method for engineering applications. It is the author`s opinion that these accomplishments represent a significant contribution to plasma simulation and the efficient numerical solution of certain systems of non-linear partial differential equations. More work needs to be done, however, for the algorithm to be of practical use in an engineering environment. Despite our success at avoiding the dielectric relaxation timestep restrictions the algorithm is still conditionally stable and requires timesteps which are relatively small. This represents a prohibitive runtime for steady state solutions on high resolution grids. Current research suggests that these limitations may be overcome and the use of much larger timesteps will be possible.