Simulation of low frequency noise in buried-channel MOSFET by a Green’s function-based numerical trap level model

Abstract

The depletion mode Buried Chanel (BC) MOSFETs are known for their reduced Low Frequency Noise (LFN) as compared with normal Surface Channel (SC) MOSFETs in the application of Charge-Coupled Devices (CCDs) and CMOS imagers. To investigate the BC MOSFETs’ LFN mechanism comprehensively, we have developed a physical-based numerical device level simulator that accounts for the LFN contribution from each single individual oxide trap. During the simulation, the trapping current amplitude ΔID matrices are extracted efficiently by the potential-current based Green’s function. The trap capture and emission time constants are calculated via Shockley–Read–Hall (SRH) theory with Wentzel-Kramers-Brillouin (WKB) tunneling approximation. To valid our simulator, both BC and SC type MOSFETs are designed and fabricated in a CMOS imager compatible process for noise measurement and comparison. Quantitatively agreement has been obtained for both types of MOSFETs in terms of LFN spectra on a wide biasing range from the extracted process-based oxide traps’ geometry and energy sites. It reveals that the low noise operation of BC MOSFETs is inseparable from both the ΔID suppression effect and the traps’ activation energy.