Simulation of INSB Devices using Drift-Diffusion Equations

Abstract

Silicon technology has for several decades followed Moore's law. Reduction of feature dimensions has resulted in constant increase in device density which has enabled increased functionality. Simultaneously, performance, such as circuit speed, has been improving. Recently, this trend is in jeopardy due to, for example, unsustainable increase in the processor power dissipation. In order to continue development trends, as outlined in ITRS roadmap, new approaches seem to be required once feature size reaches 10 - 20 nm range. This research focuses on using 111-V compounds, specifically indiumantimonide (lnSb), to supplement silicon CMOS technology. Due to its low bandgap and high mobility, lnSb shows promise as a material for extremely high frequency active devices operating at very low voltages. In this research electrical properties of lnSb material are characterized and modeled with special emphasis on recombination-generation mechanisms. Device simulators based on drift-diffusion approach - DESSIS and nanoMOS - are modified for lnSb MOSFET design and analysis. To assess the quality of lnSb MOSFET designs several figures of merit are utilized: lon/loff ratio, 1-V characteristics, threshold voltage, drain induced barrier lowering (DIBL) and unity current gain frequency for different configurations and gate lengths. It is shown that significant performance improvement can be achieved in lnSb MOSFETs through proper scaling. For example, extrapolated cutoff frequencies reach into THz range. Semi-empirical scaling rules that remedy short channel effects are proposed. Finally, quantum mechanical (QM) effects in lnSb MOSFET and their effect on device performance are examined using nanoMOS device simulation program. It is found that nonparabolicity has to be properly modeled and that QM effects have a large effect on threshold voltage and transconductance and should be included when analyzing and designing deca-nanometer size lnSb MOSFETs.