Simulation of high-speed CMOS inverter-based driver for silicon photonic segmented Mach-Zehnder modulator

Abstract

We propose a high-speed and power-efficient CMOS-inverter-based driver for a silicon photonics-based segmented Mach-Zehnder modulator (MZM). The proposed driver is equipped with area-efficient three-dimensional inductors, which are suitable for flip-chip assembly with a compact area and for inductive peaking to increase the data rate. We also employ a dual-drive push-pull configuration to drive the MZM with large voltage swing in 65-nm CMOS technology. The simulated power consumption of the proposed CMOS driver is 110 mW with 1.1-/2.2-V dual voltage supplies for an output swing of 4.0 Vppd and 40-Gb/s operation. The active area of the designed CMOS driver chip is only 230 × 280 µm2, including all the inductors. We also designed a segmented MZM with two 500-µm sections, and simulated the extinction ratio of the designed MZM with the driver is 2.4 dB at 40-Gb/s.