Abstract
Abstract The dynamic behaviour of a single flux quantum NDRO interferometer cell with two very small excess current Josephson junctions is simulated for a clamping impedance parallel to the interferometer inductance. A proper design of the clamping impedance yields the required NDRO and written operations at large damping parameters β > 1000 of the Josephson junctions. Since large damping parameters are required for logic circuits the proposed NDRO memory cell and logic circuits can now be implemented with the same fabrication process.
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