Abstract

A data flow computer architecture achieves hitgher computing speeds than the traditional von Newmann architecture by exploiting software parallelism at the instruction level in a highly parallel system of processing hardware. Data flow architectures executs- data flow graphs - directed graphs in which nodes represent instructions and interconnecting arcs define data flow oaths. One such data flow architecture, the Manchester Data Flow Computer has several rings which communicate via a common switch. This pacer describes the simulation of a single such ring. The code is written in Modula-2 using object oriented techniques. Partial cerformance figures obtained by the author's group are also presented. The paper concludes by suggesting several simulator enhancements.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.