Simulation of 2D material-based tunnel field-effect transistors: planar vs. vertical architectures

Abstract

Thanks to their thinness, self-passivated surface and large variety, two-dimensional materials have attracted much interest for their possible application in nanoelectronics. In particular, semiconducting transition metal dichalcogenides and their van der Waals heterostructures are very promising for the realization of low-power tunnel fieldeffect transistors. By means of self-consistent quantum transport simulations, we explore the performances of two alternative architectures for the devices: the planar architecture and the vertical architecture. While for the former, which is based on a p-i-n junction, the tunneling occurs laterally within the same two-dimensional material layer, in the latter the tunneling occurs through the vertical heterostructure between two different materials, which are chosen to have a convenient band alignment. Our results enable a comparison of the performance of two architectures in the ideal case, and can serve as a first guide for the choice of the transistor design based on the desired application.