Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's

Abstract

This paper presents a methodology for the analysis and prediction of the impact of wideband substrate noise on a LC-voltage controlled oscillator (LC-VCO) from DC up to local frequency (LO). The impact of substrate noise is modeled a priori in a high-ohmic 0.18mum 1P6M CMOS technology and then verified on silicon on a 900MHz LC-VCO. Below a frequency of 10MHz, the impact is dominated by the on-chip resistance of the VCO ground, while above 10MHz the bond wires, parasitics of the on-chip inductor and the PCB decoupling capacitors determine the behavior of the perturbation