Simulation-based results of weighted fair queuing algorithms for ATM networks

Abstract

The behavior of the ideal General Processor Sharing (GPS) discipline and different perÂ?VC queuing algorithms approximating this ideal scheme, namely the Self Clocked Fair Queuing, the Packet by Packet Generalized Processor Sharing, and the Virtual Starting Time disciplines, are studied in this paper via simulation. We specifically consider a simple simulation configuration involving two Constant Bit rate (CBR) connections and several ON/OFF connections (bursty traffic). This simple simulation experiment allows us to point out three important features of the GPS and approximating disciplines. First, by adequately choosing the weight coefficients, these scheduling schemes can offer to CBR traffic almost Head of Line (HOL) priority over ON/OFF connections, to each of which, nevertheless, a minimum bandwidth is guaranteed. Second, GPS and perÂ?VC queuing disciplines, like the simple FIFO scheme, is very sensitive to burst scale congestion phenomena. Finally, simulation results seem to indicate that the scheduling disciplines considered perform traffic shaping on ON/OFF connections, which drastically reduces the burstiness of output traffic.