Abstract
A pair of simulation routines have been developed in order to accurately model single event upsets in advanced CMOS SRAMs. Simulation problems addressed are those associated with modelling minority carrier charge storage and multilayer charge collection effects. As a result, the decoupling resistance to harden the cell for an advanced CMOS structure has been accurately estimated and a simulation technique for modelling the ion shunt effect has been developed. This work describes a simulation method for routine evaluation of single event effects on circuit response.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
