Abstract

As charge tunnelling through thin and ultra-thin silicon dioxide layers is regarded as the driving force for MOS device degradation the determination and characterisation of electrically week spots is of paramount importance for device reliability and failure analysis. Conductive atomic force microscopy (C-AFM) is able to address this issue with a spatial resolution smaller than the expected breakdown spot. For the determination of the electrically active oxide thickness in practice an easy to use model with sufficient accuracy and which is largely independent of the oxide thickness is required. In this work a simplified method is presented that meets these demands. The electrically active oxide thickness is determined by matching of C-AFM voltage–current curves and a tunnelling current model, which is based on an analytical tunnelling current approximation. The model holds for both the Fowler–Nordheim tunnelling and the direct tunnelling regime with one single tunnelling parameter set. The results show good agreement with macroscopic measurements for gate voltages larger than approximately 0.5–1 V, and with microscopic C-AFM measurements. For this reason arbitrary oxides in the DT and the FNT regime may be analysed with high lateral resolution by C-AFM, without the need of a preselection of the tunnelling regime to be addressed.

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