Abstract
Carrier-based modulation has been widely adopted since it offers some benefits compared to space-vector modulation in both two-level and in multilevel three-phase inverters, such as inherent simplicity, flexibility, reduced computational times and easy implementation on industrial DSPs. Among the numerous types of pulse width modulation (PWM) techniques, the centred PWM (CPWM) is nearly optimal modulation since it minimises the RMS of the output current harmonics. Despite optimised CPWM being easy to implement in two-level inverters, the complexity increases in the case of three-level and multilevel inverters. A straightforward and simplified procedure to implement optimised CPWM in carried-based modulation for the three-level inverter is proposed and numerically verified.
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