Abstract

This paper investigates the source and implication of efficiency minima that is typically observed during the second-harmonic load–pull of transistor amplifiers. The study starts with the theoretical derivation of time-domain voltage and current waveforms as a function of conduction angle ( $\alpha$ ) at the second-harmonic efficiency minima, where the output power and drain efficiency (DE) are at minimum. Thereafter, this paper unfolds a systematic re-engineering approach that is developed to recover the performance degradation and to exploit the region of efficiency minima in favor of design and implementation of high-efficiency inverse class-F power amplifiers (PAs). Interestingly, the inferences drawn from the in-depth analysis are shown to provide a simplified first-pass design approach that guarantees inverse class-F PA operation without an a priori knowledge of device parasitic elements. Theoretical postulations and simulation results are experimentally validated using an on-wafer active harmonic load–pull and a prototype design using 1.95-mm NXP gallium nitride die at a frequency of 2.6 GHz. The designed PA delivers an output power of 40 dBm with DE of 76% and gain of 12 dB at 3-dB gain compression. The measurement results confirm the theoretical framework reported in this paper.

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