Abstract
A simple and efficient model for first-order simulation of the writing of n-channel erasable programmable ROM (EPROM) cells is presented. It allows the current injected into the gate insulator of the cell transistor to be calculated, accounting (at first order) both for the nonMaxwellian form of the electron energy distribution and for the nonlocal nature of carrier heating. The model is implemented as a postprocessor of a two-dimensional device simulator, and it is validated by means of a comparison with experimental data obtained with devices with effective channel lengths ranging from 1.4 to 0.5 mu m. >
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