Abstract

There are strong reasons not to consider silicon technologies for mm-wave applications. Silicon comes up short in many comparisons to III-V semiconductors. Silicon carrier mobility is relatively low and so device-level FOMs of raw performance appear to be inferior. The silicon bandgap is relatively small and so voltage tolerance tends to be lower. Furthermore, highly-resistive or semi-insulating silicon substrates are difficult to achieve resulting in poorer isolation and higher losses in interconnects and passive devices. Each of these presents serious challenges to implementing mmwave functions. However, advances in silicon technology driven by high-performance digital applications, offer advantages to the mm-wave designer that might not be apparent on first consideration. Performance, quantified by fT , fmax orNFmin for example, has dramatically increased with geometry scaling and technology enhancements in both CMOS and SiGe HBTs [1]. Both CMOS and BiCMOS technologies have been used to demonstrate circuit functioning at frequencies in and above the K-band. Now, these silicon technologies are, by virtue of nanometer-scale design rules, able to implement staggering amounts of digital logic in a given area thereby enabling the on-chip integration of sophisticated control logic for performance tuning and/or digital signal processing. Furthermore, the worldwide manufacturing capacity of silicon technologies driven by consumer applications like gaming and personal electronic appliances assures low-cost. This will certainly provide an impetus for the evolution of mm-wave consumer applications. The combination of mm-scale wavelengths, low cost and the ability to integrate begs the consideration of array-based transceiver topologies being implemented on a single die or package.

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