Silicon Photonic Switch Topologies and Routing Strategies for Disaggregated Data Centers

Abstract

Disaggregation enabled by silicon photonic switch fabrics is a path to low-cost and energy-efficient data centers. The routing strategy, which can be seamlessly incorporated into the switch control plane, potentially provides an additional dimension for the physical-layer performance optimization, at no extra cost. In this paper, we analyze the role of optical routing strategies for silicon photonic switch fabrics. We define and quantify the number of global switching states in various switching topologies and discuss their relationship to the number of switch permutations. We propose a topology-agnostic approach that is shown to optimize fabric-wide switch path power penalties and consequently reduce the dynamic-range requirement on receivers. Additionally, it potentially compensates for device fabrication variations by taking advantage of the redundancy in switching states over switch permutations; thus, increasing fabrication tolerance. Significant power penalty improvements are demonstrated via both our simulation and test platforms, even for moderate-scale silicon switches.