Abstract
Circuit reliability issues such as bias temperature instability, hot carrier injection, time-dependent dielectric breakdown, electromigration, and random telegraph noise have become a growing concern with technology scaling. Precise measurements of circuit degradation induced by these reliability mechanisms are a key aspect of robust design. This article reviews several unique test-chip designs that demonstrate the benefits of utilizing on-chip logic and a simple test interface to automate circuit aging experiments. This new class of compact on-chip sensors can reveal important aspects of circuit aging that would otherwise be impossible to measure, facilitate the collection of reliability data from systems deployed in the field, and eventually lead us down the path to real-time aging compensation in future processors.
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