Silicon Nanowire Field Effect Transistor Test Structures Fabricated by Top-down Approaches

Abstract

So far, most of the experimental works on SiNW devices have been fabricated using the ‘bottom-up’ approach, which often exhibit difficulties in controlling the doping and contact properties of SiNWs. SiNW devices fabricated using the ‘topdown’ approach show better control and reproducibility in these parameters, but the main focus has been on traditional field-effect transistor (FET) structures with n-p-n doping, which requires complex process steps to form the source- and drain- doping and metal contacts. However, there has been little work reported to date on the properties of the ‘top-down’ fabricated SiNWFETs in spite of its immediate importance for the mainstream silicon industry. We demonstrate that SiNW with Schottky contacts can be used as enhancement-mode FETs. Schottky barrier FETs are of great interest in their own respect as an alternative to traditional doped source and drain device structure. Schottky barrier FETs have a number of advantages including simple and lowtemperature processing, good suppression of short-channel effects, and the elimination of doping and subsequent activation steps. These features are particularly desirable for SiNW devices because they can circumvent difficult fabrication issues such as an accurate control of the doping type/level and the formation of reliable ohmic contacts. We will show that SiNWs with Schottky contacts can be used as enhancement-mode FETs with an excellent on/off current ratio. Silicon nanowire field-effect transistor (SiNWFET) test structures have been fabricated by conventional ‘top-down’ approaches by using electron-beam lithography. The investigations were carried out for two types of SiNWFETs of (i) Bottom-gated FETs and (ii) Dual-gated FETs. The proposed fabrication process does not require any source and drain doping or silicide formation, thereby allowing for a simple process without thermal annealing. The effect of the contact metal work functions on the device properties and the different conduction mechanisms for both accumulation and inversion channels are discussed and compared with numerical simulation results.