Abstract

The silicon interconnect fabric (Si-IF) as a platform for integration of high performance scaled out systems including artificial intelligence systems is introduced in this article. The Si-IF is a wafer-sized platform that enables integration of bare dies at fine pitch (2–10 µm) and small inter-die spacing (≤100 µm) comparable to on-die connectivity. The choice of materials, die size, and pitch for integration on the Si-IF is discussed. The assembly process of dies on the Si-IF, electrical and mechanical experimental results, and an approach to ensure reliability of the system are described in detail. Additional system-level methodologies for communication, power delivery, and heat extraction to support heterogeneous ultralarge systems on the Si-IF platform are presented.

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