Abstract
In this study, the physical and electrical characteristics of Al2O3/La2O3/Al2O3/Si stack structures affected by the thickness of an Al2O3 barrier layer between Si substrate and La2O3 layer are investigated after a rapid thermal annealing (RTA) treatment. Time of flight secondary ion mass spectrometry (TOF-SIMS) and X-ray photoelectron spectroscopy (XPS) tests indicate that an Al2O3 barrier layer (15 atomic layer deposition (ALD) cycles, approximately 1.5 nm) plays an important role in suppressing the diffusion of silicon atoms from Si substrate into the La2O3 layer during the annealing process. As a result, some properties of La2O3 dielectric degenerated by the diffusion of Si atoms are improved. Electrical measurements (C-V, J-V) show that the thickness of Al2O3 barrier layer can affect the shift of flat band voltage (VFB) and the magnitude of gate leakage current density.
Highlights
Microelectronics technology has developed in accordance with Moore’s law for many years
In sub-45-nm complementary metal oxide semiconductor (CMOS) technology, the scaling of SiO2 gate dielectric thickness leads to an unacceptable gate leakage current, which affects the reliability of the device and causes an increase in static power dissipation
The thickness of the Al2O3 barrier layer between La2O3 layers and Si substrate is tuned by varying the number of Atomic layer deposition (ALD) cycles, which is 0, 5, 10, and 15 cycles for samples S1 ~ S4 separately
Summary
Microelectronics technology has developed in accordance with Moore’s law for many years. The performance of metal-oxide-semiconductor field-effect transistor (MOSFET) has been improving with the downscaling of feature size. In sub-45-nm complementary metal oxide semiconductor (CMOS) technology, the scaling of SiO2 gate dielectric thickness leads to an unacceptable gate leakage current, which affects the reliability of the device and causes an increase in static power dissipation. New kinds of dielectric materials with high permittivity are needed to replace the traditional SiO2 gate dielectric to obtain a smaller equivalent oxide thickness (EOT) in the CMOS industry [1,2]. The use of HfO2 (k ~ 13 to 20) as the gate dielectric in the high-k/metal gate structure has been successfully applied to MOSFET fabrication and is gradually replacing the traditional SiO2/poly-Si gate structure [3]. Further downscaling trend makes the use of HfO2 as gate dielectric in the CMOS technology
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