Abstract
When characterizing semiconductor components to determine their ESD robustness using a transmission line pulse (TLP) test system, there is no universally accepted standard procedure for performing the test available at present. In this paper, we address this issue whereby we study the impact of the following TLP characterization related variables: failure criterion, influence of stress step size and cumulative stress effects. We show that the failure criterion, `any increase in leakage', yields the most reproducible and reliable results in the devices tested.
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