Abstract
The storage requirements in data-dominant signal processing systems, whose behavior is described by array-based, loop-organized algorithmic specifications, have an important impact on the overall energy consumption, data access latency, and chip area. Finding the optimal storage of the usually large arrays from these behavioral specifications is an important step during memory allocation. This paper proposes more efficient algorithms for the intra-array storage mapping models of De Greef (De Greef, et al., 1997) and Troncon (Troncon, et al., 2002), resulting in an implementation several time faster than the original ones.
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