Abstract
Along with the fast development of dual threshold voltage (dual-V/sub t/) technology, it is possible to use it to reduce static power in low-voltage high-performance circuits. In this paper we present a new signal-path level circuit model and an algorithm based on the new circuit model which introduces the concept of extracting sub-circuits. Experimental results show that, for the ISCAS85 benchmark circuits, our algorithm produces a significant leakage-power reduction similar to the transistor level dual-V/sub t/ assignment, but the computational cost is comparative to gate level dual-V/sub t/ assignment.
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