Abstract

This paper presents the investigations in the electric performance of differential signalling transmission lines used for high speed integrated circuits (IC's) and boards by using the parallelized finite-difference time-domain (FDTD) method. The FDTD method is firstly parallelized with single-program multiple-data (SPMD) architecture using the MPI protocol and experimentally validated. The key electrical factors, crosstalk, impedance of high-speed differential transmission lines, are simulated and investigated for various configuration using the developed parallelized FDTD code. The discussions presented in this paper shall be used a guideline for engineers to optimize high-speed circuit designs with differential signaling transmission lines for signal integrity (SI) and electromagnetic compatibility (EMC).

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