Abstract

Signal-folding architecture with digital reconstruction reduces the signal amplitude at the input of an acquisition ADC and thus provides a larger effective system input range. Digital processing unfolds the signal after quantization. Three algorithms are investigated which operate with a maximum of four samples per realignment point and thus yield for a small potential hardware implementation and low computational load. A rigorous analysis of both the realignment error and the effect of wide band white noise is provided and confirmed by simulation and measurement. Noise in the folded signal must be carefully managed as it is integrated by realignment. It is found that quantization noise may dominate the system output noise and dynamic range. The approach is useful when large amplitude interference must be accommodated superimposed on a target signal and when the ADC resolution is high (typically $\geq$ 10 bit).

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