Signal analysis and real-time monitoring for wafer polishing processes using the ch computing environment

Abstract

There are several processes used in the silicon wafer fabrication industry to achieve the planarity necessary for photolithography requirements. Polishing is one of the important processes which influence surface roughness in the manufacturing of silicon wafers. As the level of a silicon wafer surface directly affects device line-width capability, process latitude, yield, and throughput in the fabrication of microchips, it is necessary for it to have an ultra precision surface and flatness. The surface roughness in wafer polishing is affected by many process parameters. To decrease the surface roughness of the wafer, controlling the polishing parameters is very important. Above all, a real-time monitoring technology of the polishing parameters is necessary for the control. In this study, parameters affecting the surface roughness of the silicon wafer are measured in real-time. In addition comparing the predicted value is done according to the process parameters using the artificial neural network. Through these results, we conduct research on the efficient parameters of silicon wafer polishing. Required programs are developed using the Ch computing environment.