Sign detection in residue arithmetic units

Abstract

Abstract The parallelism of computation, that characterizes some operations in residue number systems (RNS), is heavily reduced in operations as division, magnitude and sign detection, since numbers must be converted to the weighted system thus reducing efficiency, in spite of the efforts to speed up the conversion. In this work the problem of detecting the sign of numbers represented in RNS is considered and a procedure is devised, which keeps numbers in residue notation, and requires a redundant modulus mp+1⩾2. A sign detecting circuit is also designed that, merely to speed up the operation, exploits a further redundant modulus mr⩾p in the signed number representation. Circuit response time is evaluated, both from the complexity point of view and in a finite case, where 50 gate delays are estimated for a range [−2 64 , 2 64 −1] .