Abstract

Field programmable gate arrays (FPGAs) are flexible programmable devices that are used in a wide variety of applications. The flexibility of the FPGA hinders its performance due to the additional logic resources required for programmable hardware. The paper proposes a high speed SiGe heterojunction bipolar transistor (HBT) FPGA design co-integrated with CMOS in an IBM BiCMOS process. This device would be bitwise compatible with the Xilinx 6200, with operating frequencies in the 1–20 GHz range. To reduce power dissipation, the configuration bits used to define the FPGA's function will be stored in CMOS memory. Further power savings can be accomplished by integrating CMOS control into bipolar current trees and using a switchable current mirror to turn off unused current trees. The speed of bipolar combined with power savings of CMOS can now be merged to produce a new family of high speed FPGAs.

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