SiGe channel deposition by batch epitaxy

Abstract

Batch epitaxy has been introduced for high volume manufacturing of SiGe channels in order to reduce the cost for this epitaxial process by a factor of 3. Beside cost, SiGe channel deposition by batch epitaxy offers many benefits for manufacturing. The stability of the process and the reduced variability of the SiGe thickness greatly improve the variation of VT. The batch epitaxy process does not show a pattern loading effect for SiGe thickness reducing the complexity for manufacturing significantly. However, since the tool concept is very different to that of the widely used single wafer tools, there are some tool specific issues that need to be managed. The wafer backside is critical for batch epitaxy. A nitride backside facing the front side of the wafer results in a clear degradation of the uniformity and a change of the morphology of the SiGe channel compared to that facing a Si backside. The thermal rounding is more pronounced for the channels deposited in a batch tool for both large and narrow width devices. The device parameters of the large width device are not affected by thermal rounding but the performance of the narrow width device is clearly degraded. The thin SiGe layer at the edge of the channel driven by thermal rounding affects the VT and thus the effective device width. An in-situ etching before SiGe deposition to avoid thermal rounding was not feasible due to defects issues which were induced by the wafer backside. Finally a thermal rounding of the Si by an aggressive H2 bake before SiGe deposition improves the SiGe channel uniformity and recovers the performance degradation of the narrow width device partly.