Abstract
For high-density packaging in microelectronic industry, the three dimensional integrated circuits (3D IC) by vertically stacked silicon chips is expected to achieve higher performance than the conventional flip-chip technology. This is because in order to accomplish the multi-functional requirements for future generation electronics, interconnections with high input/output counts and fine pitch are needed. Therefore, fine pitch interconnections with through-siliconvias (TSVs) of Cu vias for 3D IC of Si chips has been developed recently. 1 Microbump technology is required to join the vias between Si chips. Lead-free solder bumps about 10 μ mi n height and in diameter were adopted in microbumps. 2 In contrast with conventional
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