SiC trench MOSFET with self‐biased p‐shield for low R ON‐SP and low OFF‐state oxide field

Abstract

A SiC trench metal-oxide-semiconductor field-effect transistor (MOSFET) with a self-biased p-shield (SBS-MOS) is proposed and comprehensively studied. The p-shield region is used to reduce the high oxide field at the OFF-state, which would otherwise be detrimental to the device long-term reliability. A self-biasing network is designed to raise the potential of the p-shield in the SBS-MOS, so that the parasitic junction field effect transistor (JFET) is driven synchronously with the MOS-gate. Mixed-mode numerical simulations are carried out to study the performance of the proposed device. The SBS-MOS boasts a reduced specific ON-resistance ( R ON-SP ) compared with the trench MOSFET with a grounded p-shield (GS-MOS), by the reduction of the JFET resistance and/or further down-scaling of the cell size. To synchronously drive the JFET region, only a slightly larger gate charge is required for the SBS-MOS. Therefore, a low OFF-state oxide field, a low R ON-SP and a low Q GD are simultaneously achieved in the proposed SBS-MOS.