Abstract

In the past few decades, silicon (Si) complementary metaloxide-semiconductor (CMOS) field-effect transistors have been scaled exponentially over time for the demand of drive current enhancement and cost reduction. As the technology node advances into sub-20 nm regimes, Si CMOS encounters immense challenges from both processing and theoretical perspectives. To maintain or further improve the transistor performance, Ge-based electronic transistors are explored as Ge exhibits higher hole and electronmobilities. As compared with the Si CMOS process, the process for fabricating high performance Ge-based transistors is still under development. This special issue aims to address some of the challenges encountered in the state-of-the-art technology, for both the Siand Ge-based electronic transistors. For Ge MOSFETs, interface engineering and gate dielectric engineering are necessary to reduce the electrical active defects in the Ge surface and the high-κ/Ge interface. Other than Ge, SiGe is another possible channel material for the future CMOS technology. SiGe could be obtained by directly growing on Si substrate and therefore it has better compatibility with Si CMOS technologies. Besides the research works on Ge-based transistors, this special issue also includes some papers on the Si lateral diffused MOS (LDMOS). Novel structural designs were demonstrated to improve the performance and reliability of the Si LDMOS. Last but not least, this issue also reports a work on increasing the responsivity of the Si n-MOSFET photodetectors. Wehope that readers of this special issuewill findnot only the accurate and most updated data in the papers, but also important solutions for the existing issues in the theory and fabrication of Siand Ge-based electronic transistors.

Highlights

  • For Ge MOSFETs, interface engineering and gate dielectric engineering are necessary to reduce the electrical active defects in the Ge surface and the high-κ/Ge interface

  • As the technology node advances into sub-20 nm regimes, Si complementary metaloxide-semiconductor (CMOS) encounters immense challenges from both processing and theoretical perspectives

  • As compared with the Si CMOS process, the process for fabricating high performance Ge-based transistors is still under development. This special issue aims to address some of the challenges encountered in the state-of-the-art technology, for both the Si- and Ge-based electronic transistors

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Summary

Introduction

For Ge MOSFETs, interface engineering and gate dielectric engineering are necessary to reduce the electrical active defects in the Ge surface and the high-κ/Ge interface. Yi Zhao,[1] Rui Zhang,[2] Jiwu Lu,[3] and Wenfeng Zhang[2] In the past few decades, silicon (Si) complementary metaloxide-semiconductor (CMOS) field-effect transistors have been scaled exponentially over time for the demand of drive current enhancement and cost reduction.

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