Shrinking Package Footprint by Embedding Top-Side Real Estate Using Core-to-Core Joining

Abstract

The electronics industry trend continues to be to continually increase capability and performance within an existing or smaller footprint. Shoehorning all of the required components onto the exterior surface of the PCB has become an increasingly difficult puzzle. The use of stacked microvias instead of plated through holes and stacked ICs in various configurations has freed up some real estate. The use of ever smaller passive devices also saves space, but reintroduces old issues such as tombstoning. The ideal solution would be to provide ‘surface’ real estate within the architecture of the circuit board – like moving items from a desk to a bookshelf – by embedding components into the board. In this paper, an alternative strategy is presented for embedded components. Sub-PCB constructions are built and populated on both sides, and then are joined using an interposer with sintering conductive paste interconnects. Sintering paste z-axis interconnections have been successfully used in this type of core-to-core joining for many years. The combination of the sintering paste interconnect and an interposer element is the key to enabling this architecture. This manufacturing strategy presents a number of advantages. The board may be broken down into logical substructures such as high density, core or RF portions. Each of the sub-PCBs can be fabricated according to best manufacturing practices for that portion of the circuit board rather than trying to fabricate a single complicated board. Yield losses from sequential process steps and multiple laminations may be reduced. The embedded components may be assembled onto the sub-PCBs using conventional solder reflow technology. The component placement can facilitate point-of-source architecture for high electrical performance. The process flow and some laboratory demonstrations of this technique will be presented in this paper.