Short-Circuit Power Reduction by Using High-Threshold Transistors

Arkadiy Morgenshtein

doi:10.3390/jlpea2010069

Abstract

In this brief paper, the dependency of short-circuit power on threshold voltage is analyzed and utilized for short circuit (SC) power reduction in multi-threshold (MTCMOS) processes. Analytical expressions are developed for estimation of the change of ratio between short-circuit power and dynamic power (PSC/Pdyn) while changing the design process. The analysis shows that the PSC/Pdyn ratio can increase significantly if the VT/Vdd ratio in new process decreases. An analytical expression is also derived for estimation of potential SC power reduction in MTCMOS processes by replacing low-VT transistors by high-VT devices in the same process. The proposed technique allows significant reduction of SC power without the need for process shift. The simulation results show good correlation with the analytical estimation at cell level, while demonstrating an average SC power saving of 36%. The performance impact is also validated, showing that timing degradation is minor and controllable. The proposed optimization technique is applicable to any multi-threshold process. The technique is simple for implementation, and can be easily integrated in the existing optimization tools.

Highlights

The power reduction in VLSI circuits is becoming one of the key challenges in the semiconductors industry
In this brief paper we present a technique for short circuit (SC) power reduction by using high-VT transistors in multi-threshold processes
The SC power is estimated by subtracting the dynamic power portion from the simulated active power

Summary

Introduction

The power reduction in VLSI circuits is becoming one of the key challenges in the semiconductors industry. The techniques for power optimization are applied at all levels of semiconductor design. Techniques for low-power logic gates implementation can be used [2] to allow reduced power and area, without compromising the performance. By providing new MOS structures, like 3D transistors [3]; or by enabling a multiple choice of threshold voltages for the circuits, the advanced manufacturing processes allow the exponential improvement in performance, dictated by Moore’s low, while maintaining the power budgets of the designs. The dynamic power Pdyn is dissipated while charging/discharging the capacitances This power dominates the total power value in most of applications and is regarded as useful, as it contributes to transition of logic signals. Opposed to the dynamic power, the short-circuit power is considered as waste, as it does not contribute to signal transitions

Short Circuit Power Analysis and Optimization

Short Circuit Power Dependency on VT

Short-Circuit Power Reduction by High-VT Transistors

Simulation Results

Summary