Abstract
In this article, the behavior of short-circuit (SC) caused by incorrect gate signals in bridge structures is analyzed in detail by semiconductor device theory, experimentations, and physics-based simulations, which has rarely been studied before. The voltage redistribution phenomenon and the associated dynamic avalanche failures are discovered. An experimental platform is designed and built to reproduce the SC conditions in bridge structures. Both theory and experimental results reveal that the bus voltage <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</sub> will be redistributed between the high-side and low-side IGBT devices, and the voltages of the devices will be reversed in the initial phase of the SC event. This article derives the formula of the voltage difference Δ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> between the high-side and low-side IGBT devices at the SC steady-state and proposes the corresponding parameter extraction method. The SC experiments at different load currents <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Load</sub> and bus voltages are performed to verify the formula. In addition, both experimental and simulation results show that when <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Load</sub> is large, the Δ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> will be close to the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC,</sub> and the device subjected to a low voltage will be in the saturation state. And the dynamic avalanche occurs during turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> transient where the SC current is shut down by the device bearing a low voltage. The associated failure cases and their relationship with SC time are discussed. A targeted SC protection scheme is proposed.
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