Shift-Sub Modular Multiplication Algorithm and Hardware Implementation for RSA Cryptography

Abstract

AbstractRSA public-key cryptography requires modular exponentiation and modular multiplication on large numbers. Montgomery Modular Multiplication is a fast method for performing modular multiplication. The modular exponentiation can be performed by repeatedly calling Montgomery Modular Multiplication. Transformations to the Montgomery Domain are required before the calculations, and a transformation back to the normal domain is also required to get the final result. The domain transformations require a value that is calculated by costly modular arithmetic. Many hardware RSA implementations use precomputed values for such domain transformations. As a result, the flexibility to use different public keys is lost. This paper introduces a Shift-Sub Modular Multiplication (SSMM) algorithm for calculating such values in fields. The algorithm does not require modular arithmetic and precomputed values. Instead, it uses shift and addition/subtraction calculations. The SSMM algorithm can also be used directly for RSA public-key cryptography. We give the hardware implementation of RSA public-key cryptography using SSMM in Verilog HDL and compare the cost and performance to that of the RSA public-key cryptography implementation using Montgomery Modular Multiplication. The results show that the performance of the two implementations is about the same, but the implementation using SSMM uses fewer hardware resources (55% to 59% adaptive logic modules and 69% to 85% flip-flops) because it does not require domain transformations.KeywordsRSA public-key cryptographyMontgomery Modular MultiplicationHardware security circuitClock frequencyHardware resources