Sheet‐carrier density and I‐V analysis of In0.7Ga0.3As/InAs/In0.7Ga0.3As/InAs/In0.7Ga0.3As dual channel double gate HEMT for THz applications

Abstract

AbstractThis paper gives a comprehensive detail about an emerging InAs high electron mobility transistor (HEMT) technology with proper material combination making it suitable for low‐power and high‐frequency applications. Over the decade, various material combinations were adopted to improve the sheet‐carrier density and frequency performances. In this work, we report the performance and optimization of 30‐nm gate length InAs‐based dual channel double gate (DCDG) HEMT for terahertz application. The dual channel is formed in the device due to the combination of five layers (In0.7Ga0.3As/InAs/In0.7Ga0.3As/InAs/In0.7Ga0.3As) and thus provides a significant improvement in drain current and transconductance. Moreover, the gate scaling with optimized gate to drain‐side recess length of gate (Lrd) leads to reduced parasitic (Cgg) and tremendously increases the RF performance metrics fmax and fT. For this device, high drain current of 2.203 mA/μm with peak transconductance of 4.77 mS/μm is observed. Further optimization of Lrd results in peak fT of 810 GHz and fmax of 900 GHz at a drain source voltage Vds = 0.5 V. These parameters empower a feasibility of the device for submillimeter as well as terahertz applications.