Shear stress effects on the device characteristics determined with indentation testing : Student paper

Abstract

An indentation approach is introduced to study the effects of shear stress on the transistor characteristics with controlled indentation experiments. An aligned cylinder tip with a defined contact angle relative to the transistor channel direction is proposed to selectively strain the silicon channels in order to induce significant shear stress. Ring oscillator circuits based on NAND and NOR gates monitor the stress effects on the characteristic circuit frequency as well as on the individual transistors. Finite Element simulations help to identify optimized setup properties for the targeted application. Comparison with previous indentation experiments derives the specific influence of each stress tensor component on the transistor characteristics.