Sharing a global on-chip transmission line medium without centralized scheduling

Abstract

We consider the design of a shared global on-chip communication medium using repeated equalized transmission lines (RETLs). Our design overcomes a number of limitations with previously proposed shared global mediums based on transmission lines. Prior solutions require wide-pitch transmission lines that occupy considerable area, do not support multicast or broadcast operations, and employ centralized schedulers that are difficult to scale. In this paper, we propose a novel design based on RETLs that utilizes thin transmission lines that require a much narrower pitch, about 6x narrower in comparison to previously proposed wide-pitch-based designs. In addition, our design supports multicast and broadcast operations, which are critical for the implementation of cache coherency protocols. Moreover, our design is based on fully distributed arbitration protocols that can achieve very high throughput and bandwidth utilization, but are simple to implement. We demonstrate a design using 32 lanes of 20 Gb/s differential RETLs that provides 640 Gb/s aggregated throughput and enables communications between any on-chip cores in under two core clock cycles, including multicast and broadcast communications. Given the narrow pitch of RETLs, our design can easily scale to multiple terabits per seconds with additional lanes. Simulation results with both synthetic and real benchmarks with up to 64 parallel threads demonstrate that our proposed distributed solutions are capable of achieving near ideal throughput.