SFQ data processing with set/reset information

Abstract

We propose a new class of SFQ logic circuits. In this new approach, an SFQ pulse represents the transition between zero and one. By using these two bits of information, a one-to-one correspondence between input and output can be realized. Since the correspondence is then the same as in semiconductor circuits, this method permits logic design without clock elements. In order to carry out this logic, we propose the most fundamental element, a new DC/SFQ converter. A computer simulation and low-speed test were performed. Both results showed that this converter operates correctly with a wide margin. Moreover, this converter also provides the basis for many other logic elements such as AND, OR, and XOR.