Abstract
In space and nuclear applications environment, there is a large amount of radiation present which seldom causes a soft error in electronic circuitry. The current trends in VLSI industry focus on decreasing the size of the transistors and fabricating a larger number of transistors on a chip with the same area. The threshold voltage of the transistor decreases on scaling. Due to radiation, when a particle hits a sensitive node of a digital circuit, the charge gets accumulated on that node. This small amount of additional voltage or charge can sometimes lead to a change in the state (soft error) of a digital circuitry. This paper presents a Radiation Hardened Pipelined ADC, where the effect of radiation is modeled by a double exponential pulse (DEP). DEP has been deemed as the most effective method for circuit based simulation. DEP is used to introduce the charge at a sensitive node to mimic the effect of radiation. The 8 bit ADC is implemented using 180 nm technology node with Cadence Virtuoso.
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