Series resistance and mobility degradation factor in C-incorporated SiGe heterostructure p-type metal–oxide semiconductor field-effect transistors

Abstract

We have fabricated p-type metal–oxide semiconductor field-effect transistor (p-MOSFET) devices with channel lengths from 0.8–10 μm on strained Si/Si0.8Ge0.2/Si and partially strain compensated Si/Si0.793Ge0.2C0.007/Si heterolayers. The device characteristics, the source–drain resistance and the mobility degradation factor have been studied for control-Si, Si0.8Ge0.2 and Si0.793Ge0.2C0.007 devices over the temperature range of 300–77 K. Though a significant improvement in the drive current of Si0.793Ge0.2C0.007 devices has been observed compared to the control-Si and Si0.8Ge0.2 devices at room temperature, the performance of ternary devices at 77 K has been found to be inferior to that of binary devices. This has been found to be due to the higher source–drain resistance and mobility degradation factor of Si0.793Ge0.2C0.007 MOSFET devices at cryogenic temperature.