Sensitivity of CMOS based imagers and scaling perspectives

Abstract

CMOS based imagers are beginning to compete against CCDs in many areas of the consumer market because of their system-on-a-chip capability. Sensitivity, however, is a main weakness of CMOS imagers and enhancements and deviations from standard CMOS processes are necessary to keep up sensitivity with downscaled process generations. In the introductory section several definitions for the sensitivity of image sensors are reviewed with regard to their potential to allow meaningful comparison of different detector structures. In the main section, the standard CMOS sensor architecture is compared to detector structures designed to improve the sensitivity, namely the photogate (PG), the pinned photodiode (PPD) and the thin film on ASIC (TFA) approach. The latter uses a vertical integration of the photodiode on top of the pixel transistors. A careful analysis of the relevant electrical, optical and technological parameters and many previously published experimental data for different imagers reveals that only the PPD and the TFA enhancements provide satisfactory sensitivity and withstand scaling down to 0.18 /spl mu/ processes. Due to the higher fill factor and the higher quantum efficiency TFA provides significantly better values than PPD. The radiometric sensitivity of a 5 /spl mu/m/spl times/5 /spl mu/m TFA pixel is found to amount to 11.9 V/(/spl mu//cm/sup 2/) for a 0.25 /spl mu/m process and 27.5 V/(/spl mu/J/cm/sup 2/) for a 0.18 /spl mu/m process.