Abstract
I/sub DDQ/ or steady state current testing has been extensively used in the industry as a mainstream defect detection and reliability screen. However, leakage current continues to increase significantly with each technology generation, making it difficult to use single threshold I/sub DDQ/ testing to differentiate between defective and defect-free chips. Alternative techniques that unprove the resolution of testing have been proposed to replace the single threshold detection scheme. All of these techniques use a single I/sub DDQ/ measurement per circuit configuration for detection and thus the scalability of these techniques is limited. Quiescent signal analysis (QSA) is a novel I/sub DDQ/ defect detection and diagnosis technique that uses measurements at multiple chip supply pads. The use of multiple measurements points per chip naturally scales down of leakage and can significantly improve detection of subtle defects. In this paper, regression and ellipse analysis of tile data collected from a test chip fabricated in a 65 nm process demonstrate the defect detection capabilities and limits of this technique.
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