Abstract

For CMOS technology, the increase of interconnects metal density is responsible for heterogeneous mechanical stress fields in active region of silicon. This mismatch originated by interconnects metal lines stress is measured through the use of piezo-resistive test structures. Local mechanical stress can thus be monitored in a simple process control compatible approach.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call